ASIC: Proof-of-Concept Binary Optimizer Reduces Size, More to Come
I’ve built a PoC binary optimizer called ASIC that replaces common instruction sequences with specialized instructions.
Even with only 2 patterns implemented out of 19 identified, it reduced a test binary by 0.02%. Imagine the potential once all patterns are covered.
Highlights:
Works directly on binaries, no source changes needed.
Compatible with existing optimizations like O2/O3, Oz, and strip.
Cross-architecture potential, not limited to ARM64 or ELF.
Can complement packing tools (like UPX) without slowing execution.
This is early-stage, but the concept proves instruction-level pattern replacement is feasible. Next step: implement all hot patterns for meaningful optimization.
Would love thoughts from anyone who’s worked with binary transformations or runtime instruction emulation.
0.02% almost reads like satire. If you're on to something you should consider open sourcing it or give far more details to start a real discussion.
One suggestion I have is that you should run this on many binaries instead of just a single one to get an idea of effect on various binaries. If you're already doing this, my apologies. The post made it sound like you've only tested this on a single binary.
I'm starting work and unfortunately I can't share the material yet because I'm in a mess with the files, but I'm already doing tests on different binaries and the results are getting better, I'll provide a more detailed description soon, and links to materials.
Well, the 0.02% number was just proof that my concept works.